This section provides reference for hardware events that can be monitored for the CPU(s):
- Intel® Xeon® E7 processor
The following performance-monitoring events are supported:
ARITH.CYCLES_DIV_BUSY
Cycles the divider is busy
ARITH.DIV
Divide Operations executed
ARITH.MUL
Multiply operations executed
BACLEAR.BAD_TARGET
BACLEAR asserted with bad target address
BACLEAR.CLEAR
BACLEAR asserted, regardless of cause
BACLEAR_FORCE_IQ
Instruction queue forced BACLEAR
BPU_CLEARS.EARLY
Early Branch Prediciton Unit clears
BPU_CLEARS.LATE
Late Branch Prediction Unit clears
BPU_MISSED_CALL_RET
Branch prediction unit missed call or return
BR_INST_DECODED
Branch instructions decoded
BR_INST_EXEC.ANY
Branch instructions executed
BR_INST_EXEC.COND
Conditional branch instructions executed
BR_INST_EXEC.DIRECT
Unconditional branches executed
BR_INST_EXEC.DIRECT_NEAR_CALL
Unconditional call branches executed
BR_INST_EXEC.INDIRECT_NEAR_CALL
Indirect call branches executed
BR_INST_EXEC.INDIRECT_NON_CALL
Indirect non call branches executed
BR_INST_EXEC.NEAR_CALLS
Call branches executed
BR_INST_EXEC.NON_CALLS
All non call branches executed
BR_INST_EXEC.RETURN_NEAR
Indirect return branches executed
BR_INST_EXEC.TAKEN
Taken branches executed
BR_INST_RETIRED.ALL_BRANCHES
Retired branch instructions (Precise Event)
BR_INST_RETIRED.ALL_BRANCHES_PS
Retired branch instructions (Precise Event)
BR_INST_RETIRED.CONDITIONAL
Retired conditional branch instructions (Precise Event)
BR_INST_RETIRED.CONDITIONAL_PS
Retired conditional branch instructions (Precise Event)
BR_INST_RETIRED.NEAR_CALL
Retired near call instructions (Precise Event)
BR_INST_RETIRED.NEAR_CALL_PS
Retired near call instructions (Precise Event)
BR_INST_RETIRED.NEAR_CALL_R3
Retired near call instructions Ring 3 only(Precise Event)
BR_INST_RETIRED.NEAR_CALL_R3_PS
Retired near call instructions Ring 3 only(Precise Event)
BR_MISP_EXEC.ANY
Mispredicted branches executed
BR_MISP_EXEC.COND
Mispredicted conditional branches executed
BR_MISP_EXEC.DIRECT
Mispredicted unconditional branches executed
BR_MISP_EXEC.DIRECT_NEAR_CALL
Mispredicted non call branches executed
BR_MISP_EXEC.INDIRECT_NEAR_CALL
Mispredicted indirect call branches executed
BR_MISP_EXEC.INDIRECT_NON_CALL
Mispredicted indirect non call branches executed
BR_MISP_EXEC.NEAR_CALLS
Mispredicted call branches executed
BR_MISP_EXEC.NON_CALLS
Mispredicted non call branches executed
BR_MISP_EXEC.RETURN_NEAR
Mispredicted return branches executed
BR_MISP_EXEC.TAKEN
Mispredicted taken branches executed
BR_MISP_RETIRED.ALL_BRANCHES
Mispredicted retired branch instructions (Precise Event)
BR_MISP_RETIRED.ALL_BRANCHES_PS
Mispredicted retired branch instructions (Precise Event)
BR_MISP_RETIRED.CONDITIONAL
Mispredicted conditional retired branches (Precise Event)
BR_MISP_RETIRED.CONDITIONAL_PS
Mispredicted conditional retired branches (Precise Event)
BR_MISP_RETIRED.NEAR_CALL
Mispredicted near retired calls (Precise Event)
BR_MISP_RETIRED.NEAR_CALL_PS
Mispredicted near retired calls (Precise Event)
CACHE_LOCK_CYCLES.L1D
Cycles L1D locked
CACHE_LOCK_CYCLES.L1D_L2
Cycles L1D and L2 locked
CPU_CLK_UNHALTED.REF
Reference cycles when thread is not halted (fixed counter)
CPU_CLK_UNHALTED.REF_P
Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)
CPU_CLK_UNHALTED.THREAD
Cycles when thread is not halted (fixed counter)
CPU_CLK_UNHALTED.THREAD_P
Cycles thread is active
CPU_CLK_UNHALTED.TOTAL_CYCLES
Total CPU cycles
DTLB_LOAD_MISSES.ANY
DTLB load misses
DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED
DTLB load miss large page walks
DTLB_LOAD_MISSES.PDE_MISS
DTLB load miss caused by low part of address
DTLB_LOAD_MISSES.STLB_HIT
DTLB second level hit
DTLB_LOAD_MISSES.WALK_COMPLETED
DTLB load miss page walks complete
DTLB_LOAD_MISSES.WALK_CYCLES
DTLB load miss page walk cycles
DTLB_MISSES.ANY
DTLB misses
DTLB_MISSES.LARGE_WALK_COMPLETED
DTLB miss large page walks
DTLB_MISSES.PDE_MISS
DTLB misses caused by low part of address. Count also includes 2M page references because 2M pages do not use the PDE.
DTLB_MISSES.STLB_HIT
DTLB first level misses but second level hit
DTLB_MISSES.WALK_COMPLETED
DTLB miss page walks
DTLB_MISSES.WALK_CYCLES
DTLB miss page walk cycles
EPT.WALK_CYCLES
Extended Page Table walk cycles
ES_REG_RENAMES
ES segment renames
FP_ASSIST.ALL
X87 Floating point assists (Precise Event)
FP_ASSIST.ALL_PS
X87 Floating point assists (Precise Event)
FP_ASSIST.OUTPUT
X87 Floating point assists for invalid output value (Precise Event)
FP_ASSIST.OUTPUT_PS
X87 Floating point assists for invalid output value (Precise Event)
FP_COMP_OPS_EXE.MMX
MMX Uops
FP_COMP_OPS_EXE.SSE2_INTEGER
SSE2 integer Uops
FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION
SSE* FP double precision Uops
FP_COMP_OPS_EXE.SSE_FP
SSE and SSE2 FP Uops
FP_COMP_OPS_EXE.SSE_FP_PACKED
SSE FP packed Uops
FP_COMP_OPS_EXE.SSE_FP_SCALAR
SSE FP scalar Uops
FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION
SSE* FP single precision Uops
FP_COMP_OPS_EXE.X87
Computational floating-point operations executed
FP_MMX_TRANS.ANY
All Floating Point to and from MMX transitions
FP_MMX_TRANS.TO_FP
Transitions from MMX to Floating Point instructions
FP_MMX_TRANS.TO_MMX
Transitions from Floating Point to MMX instructions
ILD_STALL.ANY
Any Instruction Length Decoder stall cycles
ILD_STALL.IQ_FULL
Instruction Queue full stall cycles
ILD_STALL.LCP
Length Change Prefix stall cycles
ILD_STALL.MRU
Stall cycles due to BPU MRU bypass
ILD_STALL.REGEN
Regen stall cycles
INST_DECODED.DEC0
Instructions that must be decoded by decoder 0
INST_QUEUE_WRITES
Instructions written to instruction queue.
INST_QUEUE_WRITE_CYCLES
Cycles instructions are written to the instruction queue
INST_RETIRED.ANY
Instructions retired (fixed counter)
INST_RETIRED.ANY_P
Instructions retired (Programmable counter and Precise Event)
INST_RETIRED.ANY_P_PS
Instructions retired (Programmable counter and Precise Event)
INST_RETIRED.MMX
Retired MMX instructions (Precise Event)
INST_RETIRED.MMX_PS
Retired MMX instructions (Precise Event)
INST_RETIRED.TOTAL_CYCLES
Total cycles (Precise Event)
INST_RETIRED.TOTAL_CYCLES_PS
Total cycles (Precise Event)
INST_RETIRED.X87
Retired floating-point operations (Precise Event)
INST_RETIRED.X87_PS
Retired floating-point operations (Precise Event)
IO_TRANSACTIONS
I/O transactions
ITLB_MISSES.ANY
ITLB miss
ITLB_MISSES.LARGE_WALK_COMPLETED
ITLB miss large page walks
ITLB_MISSES.WALK_COMPLETED
ITLB miss page walks
ITLB_MISSES.WALK_CYCLES
ITLB miss page walk cycles
ITLB_MISS_RETIRED
Retired instructions that missed the ITLB (Precise Event)
ITLB_MISS_RETIRED_PS
Retired instructions that missed the ITLB (Precise Event)
L1D.M_EVICT
L1D cache lines replaced in M state
L1D.M_REPL
L1D cache lines allocated in the M state
L1D.M_SNOOP_EVICT
L1D snoop eviction of cache lines in M state
L1D.REPL
L1 data cache lines allocated
L1D_CACHE_PREFETCH_LOCK_FB_HIT
L1D prefetch load lock accepted in fill buffer
L1D_PREFETCH.MISS
L1D hardware prefetch misses
L1D_PREFETCH.REQUESTS
L1D hardware prefetch requests
L1D_PREFETCH.TRIGGERS
L1D hardware prefetch requests triggered
L1D_WB_L2.E_STATE
L1 writebacks to L2 in E state
L1D_WB_L2.I_STATE
L1 writebacks to L2 in I state (misses)
L1D_WB_L2.MESI
All L1 writebacks to L2
L1D_WB_L2.M_STATE
L1 writebacks to L2 in M state
L1D_WB_L2.S_STATE
L1 writebacks to L2 in S state
L1I.CYCLES_STALLED
L1I instruction fetch stall cycles
L1I.HITS
L1I instruction fetch hits
L1I.MISSES
L1I instruction fetch misses
L1I.READS
L1I Instruction fetches
L2_DATA_RQSTS.ANY
All L2 data requests
L2_DATA_RQSTS.DEMAND.E_STATE
L2 data demand loads in E state
L2_DATA_RQSTS.DEMAND.I_STATE
L2 data demand loads in I state (misses)
L2_DATA_RQSTS.DEMAND.MESI
L2 data demand requests
L2_DATA_RQSTS.DEMAND.M_STATE
L2 data demand loads in M state
L2_DATA_RQSTS.DEMAND.S_STATE
L2 data demand loads in S state
L2_DATA_RQSTS.PREFETCH.E_STATE
L2 data prefetches in E state
L2_DATA_RQSTS.PREFETCH.I_STATE
L2 data prefetches in the I state (misses)
L2_DATA_RQSTS.PREFETCH.MESI
All L2 data prefetches
L2_DATA_RQSTS.PREFETCH.M_STATE
L2 data prefetches in M state
L2_DATA_RQSTS.PREFETCH.S_STATE
L2 data prefetches in the S state
L2_LINES_IN.ANY
L2 lines alloacated
L2_LINES_IN.E_STATE
L2 lines allocated in the E state
L2_LINES_IN.S_STATE
L2 lines allocated in the S state
L2_LINES_OUT.ANY
L2 lines evicted
L2_LINES_OUT.DEMAND_CLEAN
L2 lines evicted by a demand request
L2_LINES_OUT.DEMAND_DIRTY
L2 modified lines evicted by a demand request
L2_LINES_OUT.PREFETCH_CLEAN
L2 lines evicted by a prefetch request
L2_LINES_OUT.PREFETCH_DIRTY
L2 modified lines evicted by a prefetch request
L2_RQSTS.IFETCHES
L2 instruction fetches
L2_RQSTS.IFETCH_HIT
L2 instruction fetch hits
L2_RQSTS.IFETCH_MISS
L2 instruction fetch misses
L2_RQSTS.LD_HIT
L2 load hits
L2_RQSTS.LD_MISS
L2 load misses
L2_RQSTS.LOADS
L2 requests
L2_RQSTS.MISS
All L2 misses
L2_RQSTS.PREFETCHES
All L2 prefetches
L2_RQSTS.PREFETCH_HIT
L2 prefetch hits
L2_RQSTS.PREFETCH_MISS
L2 prefetch misses
L2_RQSTS.REFERENCES
All L2 requests
L2_RQSTS.RFOS
L2 RFO requests
L2_RQSTS.RFO_HIT
L2 RFO hits
L2_RQSTS.RFO_MISS
L2 RFO misses
L2_TRANSACTIONS.ANY
All L2 transactions
L2_TRANSACTIONS.FILL
L2 fill transactions
L2_TRANSACTIONS.IFETCH
L2 instruction fetch transactions
L2_TRANSACTIONS.L1D_WB
L1D writeback to L2 transactions
L2_TRANSACTIONS.LOAD
L2 Load transactions
L2_TRANSACTIONS.PREFETCH
L2 prefetch transactions
L2_TRANSACTIONS.RFO
L2 RFO transactions
L2_TRANSACTIONS.WB
L2 writeback to LLC transactions
L2_WRITE.LOCK.E_STATE
L2 demand lock RFOs in E state
L2_WRITE.LOCK.HIT
All demand L2 lock RFOs that hit the cache
L2_WRITE.LOCK.I_STATE
L2 demand lock RFOs in I state (misses)
L2_WRITE.LOCK.MESI
All demand L2 lock RFOs
L2_WRITE.LOCK.M_STATE
L2 demand lock RFOs in M state
L2_WRITE.LOCK.S_STATE
L2 demand lock RFOs in S state
L2_WRITE.RFO.HIT
All L2 demand store RFOs that hit the cache
L2_WRITE.RFO.I_STATE
L2 demand store RFOs in I state (misses)
L2_WRITE.RFO.MESI
All L2 demand store RFOs
L2_WRITE.RFO.M_STATE
L2 demand store RFOs in M state
L2_WRITE.RFO.S_STATE
L2 demand store RFOs in S state
LARGE_ITLB.HIT
Large ITLB hit
LOAD_BLOCK.OVERLAP_STORE
Loads that partially overlap an earlier store
LOAD_DISPATCH.ANY
All loads dispatched
LOAD_DISPATCH.MOB
Loads dispatched from the MOB
LOAD_DISPATCH.RS
Loads dispatched that bypass the MOB
LOAD_DISPATCH.RS_DELAYED
Loads dispatched from stage 305
LOAD_HIT_PRE
Load operations conflicting with software prefetches
LONGEST_LAT_CACHE.MISS
Longest latency cache miss
LONGEST_LAT_CACHE.REFERENCE
Longest latency cache reference
LSD.ACTIVE
Cycles when uops were delivered by the LSD
LSD.INACTIVE
Cycles no uops were delivered by the LSD
LSD_OVERFLOW
Loops that can't stream from the instruction queue
MACHINE_CLEARS.CYCLES
Cycles machine clear asserted
MACHINE_CLEARS.MEM_ORDER
Execution pipeline restart due to Memory ordering conflicts
MACHINE_CLEARS.SMC
Self-Modifying Code detected
MACRO_INSTS.DECODED
Instructions decoded
MACRO_INSTS.FUSIONS_DECODED
Macro-fused instructions decoded
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_0
Memory instructions retired above 0 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_1024
Memory instructions retired above 1024 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_128
Memory instructions retired above 128 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_16
Memory instructions retired above 16 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_16384
Memory instructions retired above 16384 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_2048
Memory instructions retired above 2048 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_256
Memory instructions retired above 256 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_32
Memory instructions retired above 32 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_32768
Memory instructions retired above 32768 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_4
Memory instructions retired above 4 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_4096
Memory instructions retired above 4096 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_512
Memory instructions retired above 512 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_64
Memory instructions retired above 64 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_8
Memory instructions retired above 8 clocks (Precise Event)
MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_8192
Memory instructions retired above 8192 clocks (Precise Event)
MEM_INST_RETIRED.LOADS
Instructions retired which contains a load (Precise Event)
MEM_INST_RETIRED.LOADS_PS
Instructions retired which contains a load (Precise Event)
MEM_INST_RETIRED.STORES
Instructions retired which contains a store (Precise Event)
MEM_INST_RETIRED.STORES_PS
Instructions retired which contains a store (Precise Event)
MEM_LOAD_RETIRED.DTLB_MISS
Retired loads that miss the DTLB (Precise Event)
MEM_LOAD_RETIRED.DTLB_MISS_PS
Retired loads that miss the DTLB (Precise Event)
MEM_LOAD_RETIRED.HIT_LFB
Retired loads that miss L1D and hit an previously allocated LFB (Precise Event)
MEM_LOAD_RETIRED.HIT_LFB_PS
Retired loads that miss L1D and hit an previously allocated LFB (Precise Event)
MEM_LOAD_RETIRED.L1D_HIT
Retired loads that hit the L1 data cache (Precise Event)
MEM_LOAD_RETIRED.L1D_HIT_PS
Retired loads that hit the L1 data cache (Precise Event)
MEM_LOAD_RETIRED.L2_HIT
Retired loads that hit the L2 cache (Precise Event)
MEM_LOAD_RETIRED.L2_HIT_PS
Retired loads that hit the L2 cache (Precise Event)
MEM_LOAD_RETIRED.LLC_MISS
Retired loads that miss the LLC cache (Precise Event)
MEM_LOAD_RETIRED.LLC_MISS_PS
Retired loads that miss the LLC cache (Precise Event)
MEM_LOAD_RETIRED.LLC_UNSHARED_HIT
Retired loads that hit valid versions in the LLC cache (Precise Event)
MEM_LOAD_RETIRED.LLC_UNSHARED_HIT_PS
Retired loads that hit valid versions in the LLC cache (Precise Event)
MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM
Retired loads that hit sibling core's L2 in modified or unmodified states (Precise Event)
MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM_PS
Retired loads that hit sibling core's L2 in modified or unmodified states (Precise Event)
MEM_STORE_RETIRED.DTLB_MISS
Retired stores that miss the DTLB (Precise Event)
MEM_STORE_RETIRED.DTLB_MISS_PS
Retired stores that miss the DTLB (Precise Event)
MEM_UNCORE_RETIRED.LOCAL_DRAM_AND_REMOTE_CACHE_HIT
Load instructions retired local dram and remote cache HIT data sources (Precise Event)
MEM_UNCORE_RETIRED.LOCAL_DRAM_AND_REMOTE_CACHE_HIT_PS
Load instructions retired local dram and remote cache HIT data sources (Precise Event)
MEM_UNCORE_RETIRED.LOCAL_HITM
Load instructions retired that HIT modified data in sibling core (Precise Event)
MEM_UNCORE_RETIRED.LOCAL_HITM_PS
Load instructions retired that HIT modified data in sibling core (Precise Event)
MEM_UNCORE_RETIRED.REMOTE_DRAM
Load instructions retired remote DRAM and remote home-remote cache HITM (Precise Event)
MEM_UNCORE_RETIRED.REMOTE_DRAM_PS
Load instructions retired remote DRAM and remote home-remote cache HITM (Precise Event)
MEM_UNCORE_RETIRED.REMOTE_HITM
Retired loads that hit remote socket in modified state (Precise Event)
MEM_UNCORE_RETIRED.REMOTE_HITM_PS
Retired loads that hit remote socket in modified state (Precise Event)
MEM_UNCORE_RETIRED.UNCACHEABLE
Load instructions retired IO (Precise Event)
MEM_UNCORE_RETIRED.UNCACHEABLE_PS
Load instructions retired IO (Precise Event)
MISALIGN_MEM_REF.STORE
Misaligned store references
OFFCORE_REQUESTS.ANY
All offcore requests
OFFCORE_REQUESTS.ANY.READ
Offcore read requests
OFFCORE_REQUESTS.ANY.RFO
Offcore RFO requests
OFFCORE_REQUESTS.DEMAND.READ_CODE
Offcore demand code read requests
OFFCORE_REQUESTS.DEMAND.READ_DATA
Offcore demand data read requests
OFFCORE_REQUESTS.DEMAND.RFO
Offcore demand RFO requests
OFFCORE_REQUESTS.L1D_WRITEBACK
Offcore L1 data cache writebacks
OFFCORE_REQUESTS_OUTSTANDING.ANY.READ
Outstanding offcore reads
OFFCORE_REQUESTS_OUTSTANDING.ANY.READ_NOT_EMPTY
Cycles offcore reads busy
OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE
Outstanding offcore demand code reads
OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE_NOT_EMPTY
Cycles offcore demand code read busy
OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA
Outstanding offcore demand data reads
OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA_NOT_EMPTY
Cycles offcore demand data read busy
OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO
Outstanding offcore demand RFOs
OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO_NOT_EMPTY
Cycles offcore demand RFOs busy
OFFCORE_REQUESTS_SQ_FULL
Offcore requests blocked due to Super Queue full
OFFCORE_RESPONSE_0.ANY_DATA.ANY_CACHE_DRAM
Offcore data reads satisfied by any cache or DRAM
OFFCORE_RESPONSE_0.ANY_DATA.ANY_DRAM
Offcore data reads satisfied by any DRAM
OFFCORE_RESPONSE_0.ANY_DATA.ANY_LLC_MISS
Offcore data reads that missed the LLC
OFFCORE_RESPONSE_0.ANY_DATA.ANY_LOCATION
All offcore data reads
OFFCORE_RESPONSE_0.ANY_DATA.IO_CSR_MMIO
Offcore data reads satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.ANY_DATA.LLC_HIT_NO_OTHER_CORE
Offcore data reads satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.ANY_DATA.LLC_HIT_OTHER_CORE_HIT
Offcore data reads satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.ANY_DATA.LLC_HIT_OTHER_CORE_HITM
Offcore data reads satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.ANY_DATA.LOCAL_CACHE
Offcore data reads satisfied by the LLC
OFFCORE_RESPONSE_0.ANY_DATA.LOCAL_CACHE_DRAM
Offcore data reads satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.ANY_DATA.LOCAL_DRAM
Offcore data reads satisfied by the local DRAM
OFFCORE_RESPONSE_0.ANY_DATA.REMOTE_CACHE
Offcore data reads satisfied by a remote cache
OFFCORE_RESPONSE_0.ANY_DATA.REMOTE_CACHE_DRAM
Offcore data reads satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.ANY_DATA.REMOTE_CACHE_HIT
Offcore data reads that HIT in a remote cache
OFFCORE_RESPONSE_0.ANY_DATA.REMOTE_CACHE_HITM
Offcore data reads that HITM in a remote cache
OFFCORE_RESPONSE_0.ANY_DATA.REMOTE_DRAM
Offcore data reads satisfied by a remote DRAM
OFFCORE_RESPONSE_0.ANY_IFETCH.ANY_CACHE_DRAM
Offcore code reads satisfied by any cache or DRAM
OFFCORE_RESPONSE_0.ANY_IFETCH.ANY_DRAM
Offcore code reads satisfied by any DRAM
OFFCORE_RESPONSE_0.ANY_IFETCH.ANY_LLC_MISS
Offcore code reads that missed the LLC
OFFCORE_RESPONSE_0.ANY_IFETCH.ANY_LOCATION
All offcore code reads
OFFCORE_RESPONSE_0.ANY_IFETCH.IO_CSR_MMIO
Offcore code reads satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.ANY_IFETCH.LLC_HIT_NO_OTHER_CORE
Offcore code reads satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.ANY_IFETCH.LLC_HIT_OTHER_CORE_HIT
Offcore code reads satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.ANY_IFETCH.LLC_HIT_OTHER_CORE_HITM
Offcore code reads satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.ANY_IFETCH.LOCAL_CACHE
Offcore code reads satisfied by the LLC
OFFCORE_RESPONSE_0.ANY_IFETCH.LOCAL_CACHE_DRAM
Offcore code reads satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.ANY_IFETCH.LOCAL_DRAM
Offcore code reads satisfied by the local DRAM
OFFCORE_RESPONSE_0.ANY_IFETCH.REMOTE_CACHE
Offcore code reads satisfied by a remote cache
OFFCORE_RESPONSE_0.ANY_IFETCH.REMOTE_CACHE_DRAM
Offcore code reads satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.ANY_IFETCH.REMOTE_CACHE_HIT
Offcore code reads that HIT in a remote cache
OFFCORE_RESPONSE_0.ANY_IFETCH.REMOTE_CACHE_HITM
Offcore code reads that HITM in a remote cache
OFFCORE_RESPONSE_0.ANY_IFETCH.REMOTE_DRAM
Offcore code reads satisfied by a remote DRAM
OFFCORE_RESPONSE_0.ANY_REQUEST.ANY_CACHE_DRAM
Offcore requests satisfied by any cache or DRAM
OFFCORE_RESPONSE_0.ANY_REQUEST.ANY_DRAM
Offcore requests satisfied by any DRAM
OFFCORE_RESPONSE_0.ANY_REQUEST.ANY_LLC_MISS
Offcore requests that missed the LLC
OFFCORE_RESPONSE_0.ANY_REQUEST.ANY_LOCATION
All offcore requests
OFFCORE_RESPONSE_0.ANY_REQUEST.IO_CSR_MMIO
Offcore requests satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.ANY_REQUEST.LLC_HIT_NO_OTHER_CORE
Offcore requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.ANY_REQUEST.LLC_HIT_OTHER_CORE_HIT
Offcore requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.ANY_REQUEST.LLC_HIT_OTHER_CORE_HITM
Offcore requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.ANY_REQUEST.LOCAL_CACHE
Offcore requests satisfied by the LLC
OFFCORE_RESPONSE_0.ANY_REQUEST.LOCAL_CACHE_DRAM
Offcore requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.ANY_REQUEST.LOCAL_DRAM
Offcore requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.ANY_REQUEST.REMOTE_CACHE
Offcore requests satisfied by a remote cache
OFFCORE_RESPONSE_0.ANY_REQUEST.REMOTE_CACHE_DRAM
Offcore requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.ANY_REQUEST.REMOTE_CACHE_HIT
Offcore requests that HIT in a remote cache
OFFCORE_RESPONSE_0.ANY_REQUEST.REMOTE_CACHE_HITM
Offcore requests that HITM in a remote cache
OFFCORE_RESPONSE_0.ANY_REQUEST.REMOTE_DRAM
Offcore requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.ANY_RFO.ANY_CACHE_DRAM
Offcore RFO requests satisfied by any cache or DRAM
OFFCORE_RESPONSE_0.ANY_RFO.ANY_DRAM
Offcore RFO requests satisfied by any DRAM
OFFCORE_RESPONSE_0.ANY_RFO.ANY_LLC_MISS
Offcore RFO requests that missed the LLC
OFFCORE_RESPONSE_0.ANY_RFO.ANY_LOCATION
All offcore RFO requests
OFFCORE_RESPONSE_0.ANY_RFO.IO_CSR_MMIO
Offcore RFO requests satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.ANY_RFO.LLC_HIT_NO_OTHER_CORE
Offcore RFO requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.ANY_RFO.LLC_HIT_OTHER_CORE_HIT
Offcore RFO requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.ANY_RFO.LLC_HIT_OTHER_CORE_HITM
Offcore RFO requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.ANY_RFO.LOCAL_CACHE
Offcore RFO requests satisfied by the LLC
OFFCORE_RESPONSE_0.ANY_RFO.LOCAL_CACHE_DRAM
Offcore RFO requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.ANY_RFO.LOCAL_DRAM
Offcore RFO requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.ANY_RFO.REMOTE_CACHE
Offcore RFO requests satisfied by a remote cache
OFFCORE_RESPONSE_0.ANY_RFO.REMOTE_CACHE_DRAM
Offcore RFO requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.ANY_RFO.REMOTE_CACHE_HIT
Offcore RFO requests that HIT in a remote cache
OFFCORE_RESPONSE_0.ANY_RFO.REMOTE_CACHE_HITM
Offcore RFO requests that HITM in a remote cache
OFFCORE_RESPONSE_0.ANY_RFO.REMOTE_DRAM
Offcore RFO requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.COREWB.ANY_CACHE_DRAM
Offcore writebacks to any cache or DRAM.
OFFCORE_RESPONSE_0.COREWB.ANY_DRAM
Offcore writebacks to any DRAM
OFFCORE_RESPONSE_0.COREWB.ANY_LLC_MISS
Offcore writebacks that missed the LLC
OFFCORE_RESPONSE_0.COREWB.ANY_LOCATION
All offcore writebacks
OFFCORE_RESPONSE_0.COREWB.IO_CSR_MMIO
Offcore writebacks to the IO, CSR, MMIO unit.
OFFCORE_RESPONSE_0.COREWB.LLC_HIT_NO_OTHER_CORE
Offcore writebacks to the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.COREWB.LLC_HIT_OTHER_CORE_HITM
Offcore writebacks to the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.COREWB.LOCAL_CACHE
Offcore writebacks to the LLC
OFFCORE_RESPONSE_0.COREWB.LOCAL_CACHE_DRAM
Offcore writebacks to the LLC or local DRAM
OFFCORE_RESPONSE_0.COREWB.LOCAL_DRAM
Offcore writebacks to the local DRAM
OFFCORE_RESPONSE_0.COREWB.REMOTE_CACHE
Offcore writebacks to a remote cache
OFFCORE_RESPONSE_0.COREWB.REMOTE_CACHE_DRAM
Offcore writebacks to a remote cache or remote DRAM
OFFCORE_RESPONSE_0.COREWB.REMOTE_CACHE_HIT
Offcore writebacks that HIT in a remote cache
OFFCORE_RESPONSE_0.COREWB.REMOTE_CACHE_HITM
Offcore writebacks that HITM in a remote cache
OFFCORE_RESPONSE_0.COREWB.REMOTE_DRAM
Offcore writebacks to a remote DRAM
OFFCORE_RESPONSE_0.DATA_IFETCH.ANY_CACHE_DRAM
Offcore code or data read requests satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.DATA_IFETCH.ANY_DRAM
Offcore code or data read requests satisfied by any DRAM
OFFCORE_RESPONSE_0.DATA_IFETCH.ANY_LLC_MISS
Offcore code or data read requests that missed the LLC
OFFCORE_RESPONSE_0.DATA_IFETCH.ANY_LOCATION
All offcore code or data read requests
OFFCORE_RESPONSE_0.DATA_IFETCH.IO_CSR_MMIO
Offcore code or data read requests satisfied by the IO, CSR, MMIO unit.
OFFCORE_RESPONSE_0.DATA_IFETCH.LLC_HIT_NO_OTHER_CORE
Offcore code or data read requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.DATA_IFETCH.LLC_HIT_OTHER_CORE_HIT
Offcore code or data read requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.DATA_IFETCH.LLC_HIT_OTHER_CORE_HITM
Offcore code or data read requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.DATA_IFETCH.LOCAL_CACHE
Offcore code or data read requests satisfied by the LLC
OFFCORE_RESPONSE_0.DATA_IFETCH.LOCAL_CACHE_DRAM
Offcore code or data read requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.DATA_IFETCH.LOCAL_DRAM
Offcore code or data read requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.DATA_IFETCH.REMOTE_CACHE
Offcore code or data read requests satisfied by a remote cache
OFFCORE_RESPONSE_0.DATA_IFETCH.REMOTE_CACHE_DRAM
Offcore code or data read requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.DATA_IFETCH.REMOTE_CACHE_HIT
Offcore code or data read requests that HIT in a remote cache
OFFCORE_RESPONSE_0.DATA_IFETCH.REMOTE_CACHE_HITM
Offcore code or data read requests that HITM in a remote cache
OFFCORE_RESPONSE_0.DATA_IFETCH.REMOTE_DRAM
Offcore code or data read requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.DATA_IN.ANY_CACHE_DRAM
Offcore request = all data, response = any cache_dram
OFFCORE_RESPONSE_0.DATA_IN.ANY_DRAM
Offcore request = all data, response = any DRAM
OFFCORE_RESPONSE_0.DATA_IN.ANY_LLC_MISS
Offcore request = all data, response = any LLC miss
OFFCORE_RESPONSE_0.DATA_IN.ANY_LOCATION
Offcore request = all data, response = any location
OFFCORE_RESPONSE_0.DATA_IN.IO_CSR_MMIO
Offcore data reads, RFO's and prefetches satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.DATA_IN.LLC_HIT_NO_OTHER_CORE
Offcore data reads, RFO's and prefetches statisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.DATA_IN.LLC_HIT_OTHER_CORE_HIT
Offcore data reads, RFO's and prefetches satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.DATA_IN.LLC_HIT_OTHER_CORE_HITM
Offcore data reads, RFO's and prefetches satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.DATA_IN.LOCAL_CACHE
Offcore request = all data, response = local cache
OFFCORE_RESPONSE_0.DATA_IN.LOCAL_CACHE_DRAM
Offcore request = all data, response = local cache or dram
OFFCORE_RESPONSE_0.DATA_IN.LOCAL_DRAM
Offcore data reads, RFO's and prefetches statisfied by the local DRAM.
OFFCORE_RESPONSE_0.DATA_IN.REMOTE_CACHE
Offcore request = all data, response = remote cache
OFFCORE_RESPONSE_0.DATA_IN.REMOTE_CACHE_DRAM
Offcore request = all data, response = remote cache or dram
OFFCORE_RESPONSE_0.DATA_IN.REMOTE_CACHE_HIT
Offcore data reads, RFO's and prefetches that HIT in a remote cache
OFFCORE_RESPONSE_0.DATA_IN.REMOTE_CACHE_HITM
Offcore data reads, RFO's and prefetches that HITM in a remote cache
OFFCORE_RESPONSE_0.DATA_IN.REMOTE_DRAM
Offcore data reads, RFO's and prefetches statisfied by the remote DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA.ANY_CACHE_DRAM
Offcore demand data requests satisfied by any cache or DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA.ANY_DRAM
Offcore demand data requests satisfied by any DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA.ANY_LLC_MISS
Offcore demand data requests that missed the LLC
OFFCORE_RESPONSE_0.DEMAND_DATA.ANY_LOCATION
All offcore demand data requests
OFFCORE_RESPONSE_0.DEMAND_DATA.IO_CSR_MMIO
Offcore demand data requests satisfied by the IO, CSR, MMIO unit.
OFFCORE_RESPONSE_0.DEMAND_DATA.LLC_HIT_NO_OTHER_CORE
Offcore demand data requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.DEMAND_DATA.LLC_HIT_OTHER_CORE_HIT
Offcore demand data requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.DEMAND_DATA.LLC_HIT_OTHER_CORE_HITM
Offcore demand data requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.DEMAND_DATA.LOCAL_CACHE
Offcore demand data requests satisfied by the LLC
OFFCORE_RESPONSE_0.DEMAND_DATA.LOCAL_CACHE_DRAM
Offcore demand data requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA.LOCAL_DRAM
Offcore demand data requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA.REMOTE_CACHE
Offcore demand data requests satisfied by a remote cache
OFFCORE_RESPONSE_0.DEMAND_DATA.REMOTE_CACHE_DRAM
Offcore demand data requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA.REMOTE_CACHE_HIT
Offcore demand data requests that HIT in a remote cache
OFFCORE_RESPONSE_0.DEMAND_DATA.REMOTE_CACHE_HITM
Offcore demand data requests that HITM in a remote cache
OFFCORE_RESPONSE_0.DEMAND_DATA.REMOTE_DRAM
Offcore demand data requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.ANY_CACHE_DRAM
Offcore demand data reads satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.ANY_DRAM
Offcore demand data reads satisfied by any DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.ANY_LLC_MISS
Offcore demand data reads that missed the LLC
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.ANY_LOCATION
All offcore demand data reads
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.IO_CSR_MMIO
Offcore demand data reads satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.LLC_HIT_NO_OTHER_CORE
Offcore demand data reads satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.LLC_HIT_OTHER_CORE_HIT
Offcore demand data reads satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.LLC_HIT_OTHER_CORE_HITM
Offcore demand data reads satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.LOCAL_CACHE
Offcore demand data reads satisfied by the LLC
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.LOCAL_CACHE_DRAM
Offcore demand data reads satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.LOCAL_DRAM
Offcore demand data reads satisfied by the local DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.REMOTE_CACHE
Offcore demand data reads satisfied by a remote cache
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.REMOTE_CACHE_DRAM
Offcore demand data reads satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.REMOTE_CACHE_HIT
Offcore demand data reads that HIT in a remote cache
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.REMOTE_CACHE_HITM
Offcore demand data reads that HITM in a remote cache
OFFCORE_RESPONSE_0.DEMAND_DATA_RD.REMOTE_DRAM
Offcore demand data reads satisfied by a remote DRAM
OFFCORE_RESPONSE_0.DEMAND_IFETCH.ANY_CACHE_DRAM
Offcore demand code reads satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.DEMAND_IFETCH.ANY_DRAM
Offcore demand code reads satisfied by any DRAM
OFFCORE_RESPONSE_0.DEMAND_IFETCH.ANY_LLC_MISS
Offcore demand code reads that missed the LLC
OFFCORE_RESPONSE_0.DEMAND_IFETCH.ANY_LOCATION
All offcore demand code reads
OFFCORE_RESPONSE_0.DEMAND_IFETCH.IO_CSR_MMIO
Offcore demand code reads satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.DEMAND_IFETCH.LLC_HIT_NO_OTHER_CORE
Offcore demand code reads satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.DEMAND_IFETCH.LLC_HIT_OTHER_CORE_HIT
Offcore demand code reads satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.DEMAND_IFETCH.LLC_HIT_OTHER_CORE_HITM
Offcore demand code reads satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.DEMAND_IFETCH.LOCAL_CACHE
Offcore demand code reads satisfied by the LLC
OFFCORE_RESPONSE_0.DEMAND_IFETCH.LOCAL_CACHE_DRAM
Offcore demand code reads satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.DEMAND_IFETCH.LOCAL_DRAM
Offcore demand code reads satisfied by the local DRAM
OFFCORE_RESPONSE_0.DEMAND_IFETCH.REMOTE_CACHE
Offcore demand code reads satisfied by a remote cache
OFFCORE_RESPONSE_0.DEMAND_IFETCH.REMOTE_CACHE_DRAM
Offcore demand code reads satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.DEMAND_IFETCH.REMOTE_CACHE_HIT
Offcore demand code reads that HIT in a remote cache
OFFCORE_RESPONSE_0.DEMAND_IFETCH.REMOTE_CACHE_HITM
Offcore demand code reads that HITM in a remote cache
OFFCORE_RESPONSE_0.DEMAND_IFETCH.REMOTE_DRAM
Offcore demand code reads satisfied by a remote DRAM
OFFCORE_RESPONSE_0.DEMAND_RFO.ANY_CACHE_DRAM
Offcore demand RFO requests satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.DEMAND_RFO.ANY_DRAM
Offcore demand RFO requests satisfied by any DRAM
OFFCORE_RESPONSE_0.DEMAND_RFO.ANY_LLC_MISS
Offcore demand RFO requests that missed the LLC
OFFCORE_RESPONSE_0.DEMAND_RFO.ANY_LOCATION
All offcore demand RFO requests
OFFCORE_RESPONSE_0.DEMAND_RFO.IO_CSR_MMIO
Offcore demand RFO requests satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.DEMAND_RFO.LLC_HIT_NO_OTHER_CORE
Offcore demand RFO requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.DEMAND_RFO.LLC_HIT_OTHER_CORE_HIT
Offcore demand RFO requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.DEMAND_RFO.LLC_HIT_OTHER_CORE_HITM
Offcore demand RFO requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.DEMAND_RFO.LOCAL_CACHE
Offcore demand RFO requests satisfied by the LLC
OFFCORE_RESPONSE_0.DEMAND_RFO.LOCAL_CACHE_DRAM
Offcore demand RFO requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.DEMAND_RFO.LOCAL_DRAM
Offcore demand RFO requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.DEMAND_RFO.REMOTE_CACHE
Offcore demand RFO requests satisfied by a remote cache
OFFCORE_RESPONSE_0.DEMAND_RFO.REMOTE_CACHE_DRAM
Offcore demand RFO requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.DEMAND_RFO.REMOTE_CACHE_HIT
Offcore demand RFO requests that HIT in a remote cache
OFFCORE_RESPONSE_0.DEMAND_RFO.REMOTE_CACHE_HITM
Offcore demand RFO requests that HITM in a remote cache
OFFCORE_RESPONSE_0.DEMAND_RFO.REMOTE_DRAM
Offcore demand RFO requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.OTHER.ANY_CACHE_DRAM
Offcore other requests satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.OTHER.ANY_DRAM
Offcore other requests satisfied by any DRAM
OFFCORE_RESPONSE_0.OTHER.ANY_LLC_MISS
Offcore other requests that missed the LLC
OFFCORE_RESPONSE_0.OTHER.ANY_LOCATION
All offcore other requests
OFFCORE_RESPONSE_0.OTHER.IO_CSR_MMIO
Offcore other requests satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.OTHER.LLC_HIT_NO_OTHER_CORE
Offcore other requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.OTHER.LLC_HIT_OTHER_CORE_HIT
Offcore other requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.OTHER.LLC_HIT_OTHER_CORE_HITM
Offcore other requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.OTHER.LOCAL_CACHE
Offcore other requests satisfied by the LLC
OFFCORE_RESPONSE_0.OTHER.LOCAL_CACHE_DRAM
Offcore other requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.OTHER.REMOTE_CACHE
Offcore other requests satisfied by a remote cache
OFFCORE_RESPONSE_0.OTHER.REMOTE_CACHE_DRAM
Offcore other requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.OTHER.REMOTE_CACHE_HIT
Offcore other requests that HIT in a remote cache
OFFCORE_RESPONSE_0.OTHER.REMOTE_CACHE_HITM
Offcore other requests that HITM in a remote cache
OFFCORE_RESPONSE_0.OTHER.REMOTE_DRAM
Offcore other requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.PF_DATA.ANY_CACHE_DRAM
Offcore prefetch data requests satisfied by any cache or DRAM
OFFCORE_RESPONSE_0.PF_DATA.ANY_DRAM
Offcore prefetch data requests satisfied by any DRAM
OFFCORE_RESPONSE_0.PF_DATA.ANY_LLC_MISS
Offcore prefetch data requests that missed the LLC
OFFCORE_RESPONSE_0.PF_DATA.ANY_LOCATION
All offcore prefetch data requests
OFFCORE_RESPONSE_0.PF_DATA.IO_CSR_MMIO
Offcore prefetch data requests satisfied by the IO, CSR, MMIO unit.
OFFCORE_RESPONSE_0.PF_DATA.LLC_HIT_NO_OTHER_CORE
Offcore prefetch data requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.PF_DATA.LLC_HIT_OTHER_CORE_HIT
Offcore prefetch data requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.PF_DATA.LLC_HIT_OTHER_CORE_HITM
Offcore prefetch data requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.PF_DATA.LOCAL_CACHE
Offcore prefetch data requests satisfied by the LLC
OFFCORE_RESPONSE_0.PF_DATA.LOCAL_CACHE_DRAM
Offcore prefetch data requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.PF_DATA.LOCAL_DRAM
Offcore prefetch data requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.PF_DATA.REMOTE_CACHE
Offcore prefetch data requests satisfied by a remote cache
OFFCORE_RESPONSE_0.PF_DATA.REMOTE_CACHE_DRAM
Offcore prefetch data requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.PF_DATA.REMOTE_CACHE_HIT
Offcore prefetch data requests that HIT in a remote cache
OFFCORE_RESPONSE_0.PF_DATA.REMOTE_CACHE_HITM
Offcore prefetch data requests that HITM in a remote cache
OFFCORE_RESPONSE_0.PF_DATA.REMOTE_DRAM
Offcore prefetch data requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.PF_DATA_RD.ANY_CACHE_DRAM
Offcore prefetch data reads satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.PF_DATA_RD.ANY_DRAM
Offcore prefetch data reads satisfied by any DRAM
OFFCORE_RESPONSE_0.PF_DATA_RD.ANY_LLC_MISS
Offcore prefetch data reads that missed the LLC
OFFCORE_RESPONSE_0.PF_DATA_RD.ANY_LOCATION
All offcore prefetch data reads
OFFCORE_RESPONSE_0.PF_DATA_RD.IO_CSR_MMIO
Offcore prefetch data reads satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.PF_DATA_RD.LLC_HIT_NO_OTHER_CORE
Offcore prefetch data reads satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.PF_DATA_RD.LLC_HIT_OTHER_CORE_HIT
Offcore prefetch data reads satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.PF_DATA_RD.LLC_HIT_OTHER_CORE_HITM
Offcore prefetch data reads satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.PF_DATA_RD.LOCAL_CACHE
Offcore prefetch data reads satisfied by the LLC
OFFCORE_RESPONSE_0.PF_DATA_RD.LOCAL_CACHE_DRAM
Offcore prefetch data reads satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.PF_DATA_RD.LOCAL_DRAM
Offcore prefetch data reads satisfied by the local DRAM
OFFCORE_RESPONSE_0.PF_DATA_RD.REMOTE_CACHE
Offcore prefetch data reads satisfied by a remote cache
OFFCORE_RESPONSE_0.PF_DATA_RD.REMOTE_CACHE_DRAM
Offcore prefetch data reads satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.PF_DATA_RD.REMOTE_CACHE_HIT
Offcore prefetch data reads that HIT in a remote cache
OFFCORE_RESPONSE_0.PF_DATA_RD.REMOTE_CACHE_HITM
Offcore prefetch data reads that HITM in a remote cache
OFFCORE_RESPONSE_0.PF_DATA_RD.REMOTE_DRAM
Offcore prefetch data reads satisfied by a remote DRAM
OFFCORE_RESPONSE_0.PF_IFETCH.ANY_CACHE_DRAM
Offcore prefetch code reads satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.PF_IFETCH.ANY_DRAM
Offcore prefetch code reads satisfied by any DRAM
OFFCORE_RESPONSE_0.PF_IFETCH.ANY_LLC_MISS
Offcore prefetch code reads that missed the LLC
OFFCORE_RESPONSE_0.PF_IFETCH.ANY_LOCATION
All offcore prefetch code reads
OFFCORE_RESPONSE_0.PF_IFETCH.IO_CSR_MMIO
Offcore prefetch code reads satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.PF_IFETCH.LLC_HIT_NO_OTHER_CORE
Offcore prefetch code reads satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.PF_IFETCH.LLC_HIT_OTHER_CORE_HIT
Offcore prefetch code reads satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.PF_IFETCH.LLC_HIT_OTHER_CORE_HITM
Offcore prefetch code reads satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.PF_IFETCH.LOCAL_CACHE
Offcore prefetch code reads satisfied by the LLC
OFFCORE_RESPONSE_0.PF_IFETCH.LOCAL_CACHE_DRAM
Offcore prefetch code reads satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.PF_IFETCH.LOCAL_DRAM
Offcore prefetch code reads satisfied by the local DRAM
OFFCORE_RESPONSE_0.PF_IFETCH.REMOTE_CACHE
Offcore prefetch code reads satisfied by a remote cache
OFFCORE_RESPONSE_0.PF_IFETCH.REMOTE_CACHE_DRAM
Offcore prefetch code reads satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.PF_IFETCH.REMOTE_CACHE_HIT
Offcore prefetch code reads that HIT in a remote cache
OFFCORE_RESPONSE_0.PF_IFETCH.REMOTE_CACHE_HITM
Offcore prefetch code reads that HITM in a remote cache
OFFCORE_RESPONSE_0.PF_IFETCH.REMOTE_DRAM
Offcore prefetch code reads satisfied by a remote DRAM
OFFCORE_RESPONSE_0.PF_RFO.ANY_CACHE_DRAM
Offcore prefetch RFO requests satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.PF_RFO.ANY_DRAM
Offcore prefetch RFO requests satisfied by any DRAM
OFFCORE_RESPONSE_0.PF_RFO.ANY_LLC_MISS
Offcore prefetch RFO requests that missed the LLC
OFFCORE_RESPONSE_0.PF_RFO.ANY_LOCATION
All offcore prefetch RFO requests
OFFCORE_RESPONSE_0.PF_RFO.IO_CSR_MMIO
Offcore prefetch RFO requests satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.PF_RFO.LLC_HIT_NO_OTHER_CORE
Offcore prefetch RFO requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.PF_RFO.LLC_HIT_OTHER_CORE_HIT
Offcore prefetch RFO requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.PF_RFO.LLC_HIT_OTHER_CORE_HITM
Offcore prefetch RFO requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.PF_RFO.LOCAL_CACHE
Offcore prefetch RFO requests satisfied by the LLC
OFFCORE_RESPONSE_0.PF_RFO.LOCAL_CACHE_DRAM
Offcore prefetch RFO requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.PF_RFO.LOCAL_DRAM
Offcore prefetch RFO requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.PF_RFO.REMOTE_CACHE
Offcore prefetch RFO requests satisfied by a remote cache
OFFCORE_RESPONSE_0.PF_RFO.REMOTE_CACHE_DRAM
Offcore prefetch RFO requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.PF_RFO.REMOTE_CACHE_HIT
Offcore prefetch RFO requests that HIT in a remote cache
OFFCORE_RESPONSE_0.PF_RFO.REMOTE_CACHE_HITM
Offcore prefetch RFO requests that HITM in a remote cache
OFFCORE_RESPONSE_0.PF_RFO.REMOTE_DRAM
Offcore prefetch RFO requests satisfied by a remote DRAM
OFFCORE_RESPONSE_0.PREFETCH.ANY_CACHE_DRAM
Offcore prefetch requests satisfied by any cache or DRAM.
OFFCORE_RESPONSE_0.PREFETCH.ANY_DRAM
Offcore prefetch requests satisfied by any DRAM
OFFCORE_RESPONSE_0.PREFETCH.ANY_LLC_MISS
Offcore prefetch requests that missed the LLC
OFFCORE_RESPONSE_0.PREFETCH.ANY_LOCATION
All offcore prefetch requests
OFFCORE_RESPONSE_0.PREFETCH.IO_CSR_MMIO
Offcore prefetch requests satisfied by the IO, CSR, MMIO unit
OFFCORE_RESPONSE_0.PREFETCH.LLC_HIT_NO_OTHER_CORE
Offcore prefetch requests satisfied by the LLC and not found in a sibling core
OFFCORE_RESPONSE_0.PREFETCH.LLC_HIT_OTHER_CORE_HIT
Offcore prefetch requests satisfied by the LLC and HIT in a sibling core
OFFCORE_RESPONSE_0.PREFETCH.LLC_HIT_OTHER_CORE_HITM
Offcore prefetch requests satisfied by the LLC and HITM in a sibling core
OFFCORE_RESPONSE_0.PREFETCH.LOCAL_CACHE
Offcore prefetch requests satisfied by the LLC
OFFCORE_RESPONSE_0.PREFETCH.LOCAL_CACHE_DRAM
Offcore prefetch requests satisfied by the LLC or local DRAM
OFFCORE_RESPONSE_0.PREFETCH.LOCAL_DRAM
Offcore prefetch requests satisfied by the local DRAM
OFFCORE_RESPONSE_0.PREFETCH.REMOTE_CACHE
Offcore prefetch requests satisfied by a remote cache
OFFCORE_RESPONSE_0.PREFETCH.REMOTE_CACHE_DRAM
Offcore prefetch requests satisfied by a remote cache or remote DRAM
OFFCORE_RESPONSE_0.PREFETCH.REMOTE_CACHE_HIT
Offcore prefetch requests that HIT in a remote cache
OFFCORE_RESPONSE_0.PREFETCH.REMOTE_CACHE_HITM
Offcore prefetch requests that HITM in a remote cache
OFFCORE_RESPONSE_0.PREFETCH.REMOTE_DRAM
Offcore prefetch requests satisfied by a remote DRAM
PARTIAL_ADDRESS_ALIAS
False dependencies due to partial address aliasing
RAT_STALLS.ANY
All RAT stall cycles
RAT_STALLS.FLAGS
Flag stall cycles
RAT_STALLS.REGISTERS
Partial register stall cycles
RAT_STALLS.ROB_READ_PORT
ROB read port stalls cycles
RAT_STALLS.SCOREBOARD
Scoreboard stall cycles
RESOURCE_STALLS.ANY
Resource related stall cycles
RESOURCE_STALLS.FPCW
FPU control word write stall cycles
RESOURCE_STALLS.LOAD
Load buffer stall cycles
RESOURCE_STALLS.MXCSR
MXCSR rename stall cycles
RESOURCE_STALLS.OTHER
Other Resource related stall cycles
RESOURCE_STALLS.ROB_FULL
ROB full stall cycles
RESOURCE_STALLS.RS_FULL
Reservation Station full stall cycles
RESOURCE_STALLS.STORE
Store buffer stall cycles
SB_DRAIN.ANY
All Store buffer stall cycles
SEG_RENAME_STALLS
Segment rename stall cycles
SIMD_INT_128.PACK
128 bit SIMD integer pack operations
SIMD_INT_128.PACKED_ARITH
128 bit SIMD integer arithmetic operations
SIMD_INT_128.PACKED_LOGICAL
128 bit SIMD integer logical operations
SIMD_INT_128.PACKED_MPY
128 bit SIMD integer multiply operations
SIMD_INT_128.PACKED_SHIFT
128 bit SIMD integer shift operations
SIMD_INT_128.SHUFFLE_MOVE
128 bit SIMD integer shuffle/move operations
SIMD_INT_128.UNPACK
128 bit SIMD integer unpack operations
SIMD_INT_64.PACK
SIMD integer 64 bit pack operations
SIMD_INT_64.PACKED_ARITH
SIMD integer 64 bit arithmetic operations
SIMD_INT_64.PACKED_LOGICAL
SIMD integer 64 bit logical operations
SIMD_INT_64.PACKED_MPY
SIMD integer 64 bit packed multiply operations
SIMD_INT_64.PACKED_SHIFT
SIMD integer 64 bit shift operations
SIMD_INT_64.SHUFFLE_MOVE
SIMD integer 64 bit shuffle/move operations
SIMD_INT_64.UNPACK
SIMD integer 64 bit unpack operations
SNOOPQ_REQUESTS.CODE
Snoop code requests
SNOOPQ_REQUESTS.DATA
Snoop data requests
SNOOPQ_REQUESTS.INVALIDATE
Snoop invalidate requests
SNOOPQ_REQUESTS_OUTSTANDING.CODE
Outstanding snoop code requests
SNOOPQ_REQUESTS_OUTSTANDING.CODE_NOT_EMPTY
Cycles snoop code requests queued
SNOOPQ_REQUESTS_OUTSTANDING.DATA
Outstanding snoop data requests
SNOOPQ_REQUESTS_OUTSTANDING.DATA_NOT_EMPTY
Cycles snoop data requests queued
SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE
Outstanding snoop invalidate requests
SNOOPQ_REQUESTS_OUTSTANDING.INVALIDATE_NOT_EMPTY
Cycles snoop invalidate requests queued
SNOOP_RESPONSE.HIT
Thread responded HIT to snoop
SNOOP_RESPONSE.HITE
Thread responded HITE to snoop
SNOOP_RESPONSE.HITM
Thread responded HITM to snoop
SQ_FULL_STALL_CYCLES
Super Queue full stall cycles
SQ_MISC.LRU_HINTS
Super Queue LRU hints sent to LLC
SQ_MISC.SPLIT_LOCK
Super Queue lock splits across a cache line
SSEX_UOPS_RETIRED.PACKED_DOUBLE
SIMD Packed-Double Uops retired (Precise Event)
SSEX_UOPS_RETIRED.PACKED_DOUBLE_PS
SIMD Packed-Double Uops retired (Precise Event)
SSEX_UOPS_RETIRED.PACKED_SINGLE
SIMD Packed-Single Uops retired (Precise Event)
SSEX_UOPS_RETIRED.PACKED_SINGLE_PS
SIMD Packed-Single Uops retired (Precise Event)
SSEX_UOPS_RETIRED.SCALAR_DOUBLE
SIMD Scalar-Double Uops retired (Precise Event)
SSEX_UOPS_RETIRED.SCALAR_DOUBLE_PS
SIMD Scalar-Double Uops retired (Precise Event)
SSEX_UOPS_RETIRED.SCALAR_SINGLE
SIMD Scalar-Single Uops retired (Precise Event)
SSEX_UOPS_RETIRED.SCALAR_SINGLE_PS
SIMD Scalar-Single Uops retired (Precise Event)
SSEX_UOPS_RETIRED.VECTOR_INTEGER
SIMD Vector Integer Uops retired (Precise Event)
SSEX_UOPS_RETIRED.VECTOR_INTEGER_PS
SIMD Vector Integer Uops retired (Precise Event)
STORE_BLOCKS.AT_RET
Loads delayed with at-Retirement block code
STORE_BLOCKS.L1D_BLOCK
Cacheable loads delayed with L1D block code
TWO_UOP_INSTS_DECODED
Two Uop instructions decoded
UNC_M_B_CMD.SPRWR_BCMD
TBD
UNC_M_DRAM_CMD.CASPRE_RD_SCMD
TBD
UNC_M_DRAM_CMD.CASPRE_RD_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.CASPRE_RD_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.CASPRE_RD_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.CASPRE_RD_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.CASPRE_WR_SCMD
TBD
UNC_M_DRAM_CMD.CASPRE_WR_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.CASPRE_WR_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.CASPRE_WR_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.CASPRE_WR_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.CAS_RD_SCMD
TBD
UNC_M_DRAM_CMD.CAS_RD_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.CAS_RD_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.CAS_RD_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.CAS_RD_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.CAS_WR_SCMD
TBD
UNC_M_DRAM_CMD.CAS_WR_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.CAS_WR_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.CAS_WR_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.CAS_WR_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.CKEH_SCMD
TBD
UNC_M_DRAM_CMD.CKEH_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.CKEH_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.CKEH_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.CKEH_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.CKEL_SCMD
TBD
UNC_M_DRAM_CMD.CKEL_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.CKEL_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.CKEL_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.CKEL_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.EMRS2_SCMD
TBD
UNC_M_DRAM_CMD.EMRS2_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.EMRS2_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.EMRS2_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.EMRS2_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.EMRS3_SCMD
TBD
UNC_M_DRAM_CMD.EMRS3_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.EMRS3_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.EMRS3_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.EMRS3_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.EMRS_SCMD
TBD
UNC_M_DRAM_CMD.EMRS_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.EMRS_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.EMRS_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.EMRS_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.ENSR_SCMD
TBD
UNC_M_DRAM_CMD.ENSR_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.ENSR_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.ENSR_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.ENSR_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.EXSR_SCMD
TBD
UNC_M_DRAM_CMD.EXSR_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.EXSR_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.EXSR_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.EXSR_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.GENDRM_SCMD
TBD
UNC_M_DRAM_CMD.GENDRM_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.GENDRM_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.GENDRM_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.GENDRM_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.IBD_SCMD
TBD
UNC_M_DRAM_CMD.IBD_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.IBD_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.IBD_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.IBD_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.MRS_SCMD
TBD
UNC_M_DRAM_CMD.MRS_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.MRS_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.MRS_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.MRS_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.NOP_SCMD
TBD
UNC_M_DRAM_CMD.NOP_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.NOP_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.NOP_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.NOP_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.NOWPE_SCMD
TBD
UNC_M_DRAM_CMD.NOWPE_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.NOWPE_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.NOWPE_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.NOWPE_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.POLL_SCMD
TBD
UNC_M_DRAM_CMD.POLL_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.POLL_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.POLL_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.POLL_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.PREALL_SCMD
TBD
UNC_M_DRAM_CMD.PREALL_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.PREALL_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.PREALL_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.PREALL_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.PRE_SCMD
TBD
UNC_M_DRAM_CMD.PRE_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.PRE_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.PRE_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.PRE_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.RAS_SCMD
TBD
UNC_M_DRAM_CMD.RAS_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.RAS_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.RAS_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.RAS_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.RFR_SCMD
TBD
UNC_M_DRAM_CMD.RFR_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.RFR_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.RFR_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.RFR_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.SFT_RST_SCMD
TBD
UNC_M_DRAM_CMD.SFT_RST_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.SFT_RST_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.SFT_RST_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.SFT_RST_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.SYNC_SCMD
TBD
UNC_M_DRAM_CMD.SYNC_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.SYNC_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.SYNC_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.SYNC_SCMD.WRITEMAJORMODE
TBD
UNC_M_DRAM_CMD.TRKL_SCMD
TBD
UNC_M_DRAM_CMD.TRKL_SCMD.ADAPTIVEMODE
TBD
UNC_M_DRAM_CMD.TRKL_SCMD.READMAJORMODE
TBD
UNC_M_DRAM_CMD.TRKL_SCMD.TRADEOFFMODE
TBD
UNC_M_DRAM_CMD.TRKL_SCMD.WRITEMAJORMODE
TBD
UNC_M_DSP_FILL.RDQ_EMPTY
TBD
UNC_M_DSP_FILL.RDQ_FULL
TBD
UNC_M_DSP_FILL.WRQ_EMPTY
TBD
UNC_M_DSP_FILL.WRQ_FULL
TBD
UNC_M_DSP_FULL_CNT_EN.RDQ_EMPTY
TBD
UNC_M_DSP_FULL_CNT_EN.RDQ_FULL
TBD
UNC_M_DSP_FULL_CNT_EN.WRQ_EMPTY
TBD
UNC_M_DSP_FULL_CNT_EN.WRQ_FULL
TBD
UNC_M_OPN2CLS.CLS2OPN
TBD
UNC_M_OPN2CLS.OPN2CLS
TBD
UNC_M_OPNCLS_CNT_EN.CLOSED
TBD
UNC_M_OPNCLS_CNT_EN.OPEN
TBD
UNC_M_REFRESH_CONFLICT
TBD
UNC_M_SCHED_INFLIGHT_CMD
TBD
UNC_M_SCHED_MODE_CNT_EN.ADAPTIVE
TBD
UNC_M_SCHED_MODE_CNT_EN.READ_MAJOR
TBD
UNC_M_SCHED_MODE_CNT_EN.TRADEOFF
TBD
UNC_M_SCHED_MODE_CNT_EN.WRITE_MAJOR
TBD
UNC_M_TIME_STAMP_TICK
TBD
UNC_M_ZLATENCY_CNT_EN.ALL
TBD
UNC_M_ZLATENCY_CNT_EN.F2B_BCMD
TBD
UNC_M_ZLATENCY_CNT_EN.F2V_BCMD
TBD
UNC_M_ZLATENCY_CNT_EN.MRG_BCMD
TBD
UNC_M_ZLATENCY_CNT_EN.RD_BCMD
TBD
UNC_M_ZLATENCY_CNT_EN.SPRWR_BCMD
TBD
UNC_M_ZLATENCY_CNT_EN.V2F_BCMD
TBD
UNC_M_ZLATENCY_CNT_EN.V2V_BCMD
TBD
UNC_M_ZLATENCY_CNT_EN.WR_BCMD
TBD
UNC_R_FLT_SENT_EN
Counts Output port sends NULL flit
UNC_R_INP_RCVD_VN_MSGC_SEL.ANY.DRS
ANY Data Response Messages
UNC_R_OUT_NULL_IDLE_EN
Counts Output port sends NULL flit
UNC_R_TARGET_AVAILABLE
Times target available at output port
UNC_W_CLOCKTICKS
uncore clock frequency
UOPS_DECODED.ESP_FOLDING
Stack pointer instructions decoded
UOPS_DECODED.ESP_SYNC
Stack pointer sync operations
UOPS_DECODED.MS_CYCLES_ACTIVE
Uops decoded by Microcode Sequencer
UOPS_DECODED.STALL_CYCLES
Cycles no Uops are decoded
UOPS_EXECUTED.CORE_ACTIVE_CYCLES
Cycles Uops executed on any port (core count)
UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5
Cycles Uops executed on ports 0-4 (core count)
UOPS_EXECUTED.CORE_STALL_COUNT
Uops executed on any port (core count)
UOPS_EXECUTED.CORE_STALL_COUNT_NO_PORT5
Uops executed on ports 0-4 (core count)
UOPS_EXECUTED.CORE_STALL_CYCLES
Cycles no Uops issued on any port (core count)
UOPS_EXECUTED.CORE_STALL_CYCLES_NO_PORT5
Cycles no Uops issued on ports 0-4 (core count)
UOPS_EXECUTED.PORT0
Uops executed on port 0
UOPS_EXECUTED.PORT015
Uops issued on ports 0, 1 or 5
UOPS_EXECUTED.PORT015_STALL_CYCLES
Cycles no Uops issued on ports 0, 1 or 5
UOPS_EXECUTED.PORT1
Uops executed on port 1
UOPS_EXECUTED.PORT234_CORE
Uops issued on ports 2, 3 or 4
UOPS_EXECUTED.PORT2_CORE
Uops executed on port 2 (core count)
UOPS_EXECUTED.PORT3_CORE
Uops executed on port 3 (core count)
UOPS_EXECUTED.PORT4_CORE
Uops executed on port 4 (core count)
UOPS_EXECUTED.PORT5
Uops executed on port 5
UOPS_ISSUED.ANY
Uops issued
UOPS_ISSUED.CORE_STALL_CYCLES
Cycles no Uops were issued on any thread
UOPS_ISSUED.CYCLES_ALL_THREADS
Cycles Uops were issued on either thread
UOPS_ISSUED.FUSED
Fused Uops issued
UOPS_ISSUED.STALL_CYCLES
Cycles no Uops were issued
UOPS_RETIRED.ACTIVE_CYCLES
Cycles Uops are being retired
UOPS_RETIRED.ACTIVE_CYCLES_PS
Cycles Uops are being retired
UOPS_RETIRED.ANY
Uops retired (Precise Event)
UOPS_RETIRED.ANY_PS
Uops retired (Precise Event)
UOPS_RETIRED.MACRO_FUSED
Macro-fused Uops retired (Precise Event)
UOPS_RETIRED.MACRO_FUSED_PS
Macro-fused Uops retired (Precise Event)
UOPS_RETIRED.RETIRE_SLOTS
Retirement slots used (Precise Event)
UOPS_RETIRED.RETIRE_SLOTS_PS
Retirement slots used (Precise Event)
UOPS_RETIRED.STALL_CYCLES
Cycles Uops are not retiring (Precise Event)
UOPS_RETIRED.STALL_CYCLES_PS
Cycles Uops are not retiring (Precise Event)
UOPS_RETIRED.TOTAL_CYCLES
Total cycles using precise uop retired event (Precise Event)
UOPS_RETIRED.TOTAL_CYCLES_PS
Total cycles using precise uop retired event (Precise Event)
UOP_UNFUSION
Uop unfusions due to FP exceptions